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Engineering of Analogical and Digital Systems (SEAD 1)

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First semester
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Instructional Objectives: 

The objective of this course is to introduce students in the techniques and software tools for the design of integrated circuits and electronic systems, with applications in information processing, communications and instrumentation. Students will learn to design:
• Analog submodules based on operational amplifiers (OPA).
• Digital subsystems from high-level descriptions, including the making of
o Control machines
o Arithmetic-logic data paths
In both cases, students learn how to use design tools and to make flow design.


Set 1. Introduction to digital systems
1.1 General Purpose Elements: Microprocessors and DSPs
1.2 Specific purpose elements: ASICs and FPGAs
1.2.1 Design flow
1.2.2 Languages for description of HW: VHDL
Set 2. Digital design
2.1 Combinational logic
2.2 Sequential logic
2.3 Arithmetic Circuits and Data Paths
2.4 Design at register transfer level (RTL)
Set 3: Timing in Synchronous Systems
3.1 Bias sources (skew) and fluctuation (jitter)
3.2 Clock Distribution Techniques
3.3 Synchronization with PLL
3.4 Signal integrity
Set 4. Ideal Operational Amplifier
4.1 Nonlinearities of the Operational Amplifier
4.2 Static constraints
4.3 Dynamic constraints
4.4 Noise
4.4 Stability
Set 5. Analog subsystems
5.1 Nonlinear circuits
5.2 Signal generators
5.3 References and Voltage Regulators
Set 6. Advanced issues
6.1 Realization of PCBs
6.2 Testability
6.3 Precompiled cores (memories, processors...)
6.4 Consumption
6.5 Electromagnetic compatibility
6.6 A/D and D/A converters


Evaluation in the ordinary examination periods will be based on the following parameters:
• Participation in forums and activities in the virtual environment (5%)
• Assistance at lessons (10%). Class attendance will be evaluated in accordance with the tasks proposed and performed during lessons hours.
• Proposed exercises, individual work or teamwork (45%)
• Final exam (40%). A minimum of 5.0 points should be obtained (otherwise the final grade will be ‘fail’, regardless of other qualifications). It will consist of a short question examination without books and some exercise to be developed.
In the extra exams the proposed exercise will weigh 50% at the expense of participation.
From the above, a continuous monitoring of the course it is important as well as the use of the forums, hours of tutoring and lessons to leave no remaining doubts that could impede a regular progress.
The study of the matter that will be indicated before undertaking any practical work or, of course, a follow-up examination is also fundamental.

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• Jaeger, R.; Blalock, T.: Microelectronic Circuit Design. McGraw-Hill (4th edition). 2010.
• Geiger, R.L.; Allen, P.E.; Strader, N.R.: VLSI - Design Techniques for Analog and Digital Circuits. Mcgraw-Hill Series in Electrical Engineering. 1989.
• Allen, P.; Holdberg, D.: CMOS Analog Circuit Design. Oxford University Press (2nd edition), 2002
• Maloberti,F.: Analog Design for CMOS VLSI System. Springer, 2010
• Sedra, A. S.; Smith, K. C.: Microelectronic Circuits. Oxford University Press (6th edition), 2009.
• Franco, S.: Design with Operational Amplifiers and Analog Integrated Circuits. McGraw-Hill (3rd edition), 2001.
• Kilts, S.: Advanced FPGA Design: Architecture, Implementation, and Optimization. Wiley-IEEE Press. 2007.
• Zwolinski, M.: Digital System Design with VHDL. Prentice-Hall (2nd edition). 2004.
• Chu, P.: FPGA Prototyping by VHDL Examples. Wiley-Interscience. 2008.
• Wolf, W.: FPGA-Based System Design. Prentice-Hall, 2004.
• Wolf, W.: Modern VLSI Design: System-on-chip Design. Prentice-Hall (3rd edition), 2002.

Short description: the work: 
<p>The methodology to be used is called &quot;b-learning&quot; (&quot;blended-learning&quot;: mixed, classroom and virtual), with a greater weight on the virtual part.<br /> The virtual environment, therefore, is a key component of the process and therefore requires an effort of personal work than traditional courses of attendance type. It has for this purpose a platform (Moodle) that will support the site of the doctoral program with a specific page for this subject. In it the student will find:<br /> &bull; Course overview<br /> &bull; Documentation and exercises, as well as the formats required for the tasks (exercises or projects).<br /> &bull; Calendar and activities plan, specifying the syllabus of the lessons.<br /> &bull; Forums for virtual tutoring<br /> &bull; Mailbox for handing in the different tasks<br /> &bull; Web links<br /> &bull; Surveys and Questionnaires<br /> Overall, the guideline to be followed in the development of the course is as follows:<br /> &bull; The subject to be studied in each stage of the course will be indicated. The details can be found in the activities plan published on the Moodle platform.<br /> &bull; Concerns that may exist can be resolved in the appropriate forum, either among students (which is encouraged and will be assessed) or by the teacher.<br /> &bull; Likewise, exercises or case studies may be proposed to be carried out individually or in groups, as will be indicated in each case.</p> <p>In each lesson, following the specific syllabus to be established and published in the virtual site, the teacher may make a small presentation of the parts he considers more complex or have generated most doubts. Some time will also be dedicated to resolve any questions that may arise by writing at the beginning of the class (this document is considered during the evaluation process, if it is stated in the agenda of each class). It may mean solving some exercise or discuss any issue that may arise.<br /> &bull; In addition to virtual tutoring through forums, as mentioned before, there is the possibility of tutoring with the teacher at the indicated times also on the virtual platform.<br /> &bull; Throughout all this process, it is key to keep pace with progress of the course, as the tasks and the periodic tests will have a weight in the final evaluation and they facilitate the monitoring of the course. This ease is what makes this approach didactical.<br /> &bull; The participation made in the virtual environment will be assessed (see Evaluation section).</p>