The objective of this course is to introduce students in the techniques and software tools for the design of integrated circuits and electronic systems, with applications in information processing, communications and instrumentation. Students will learn to design:
• Analog submodules based on operational amplifiers (OPA).
• Digital subsystems from high-level descriptions, including the making of
o Control machines
o Arithmetic-logic data paths
In both cases, students learn how to use design tools and to make flow design.
Set 1. Introduction to digital systems
1.1 General Purpose Elements: Microprocessors and DSPs
1.2 Specific purpose elements: ASICs and FPGAs
1.2.1 Design flow
1.2.2 Languages for description of HW: VHDL
Set 2. Digital design
2.1 Combinational logic
2.2 Sequential logic
2.3 Arithmetic Circuits and Data Paths
2.4 Design at register transfer level (RTL)
Set 3: Timing in Synchronous Systems
3.1 Bias sources (skew) and fluctuation (jitter)
3.2 Clock Distribution Techniques
3.3 Synchronization with PLL
3.4 Signal integrity
Set 4. Ideal Operational Amplifier
4.1 Nonlinearities of the Operational Amplifier
4.2 Static constraints
4.3 Dynamic constraints
4.4 Noise
4.4 Stability
Set 5. Analog subsystems
5.1 Nonlinear circuits
5.2 Signal generators
5.3 References and Voltage Regulators
Set 6. Advanced issues
6.1 Realization of PCBs
6.2 Testability
6.3 Precompiled cores (memories, processors...)
6.4 Consumption
6.5 Electromagnetic compatibility
6.6 A/D and D/A converters
Evaluation in the ordinary examination periods will be based on the following parameters:
• Participation in forums and activities in the virtual environment (5%)
• Assistance at lessons (10%). Class attendance will be evaluated in accordance with the tasks proposed and performed during lessons hours.
• Proposed exercises, individual work or teamwork (45%)
• Final exam (40%). A minimum of 5.0 points should be obtained (otherwise the final grade will be ‘fail’, regardless of other qualifications). It will consist of a short question examination without books and some exercise to be developed.
In the extra exams the proposed exercise will weigh 50% at the expense of participation.
From the above, a continuous monitoring of the course it is important as well as the use of the forums, hours of tutoring and lessons to leave no remaining doubts that could impede a regular progress.
The study of the matter that will be indicated before undertaking any practical work or, of course, a follow-up examination is also fundamental.
Links:
[1] https://www.die.upm.es/en/category/categoria/programa-master
[2] https://www.die.upm.es/sites/default/files/SEAD-MISE_en_0.pdf
[3] https://www.die.upm.es/en/content/andr%C3%A9s-santos-y-lle%C3%B3
[4] https://www.die.upm.es/en/MISE/home
[5] https://www.die.upm.es/en/DSE/home