V EURASIP Seminar on HW Design of DSP Systems

April 29, 2015

Aula Polivalente 2

AGENDA

10:00-10:15

"Introduction to EURASIP"

Gabriel Caffarena, Universidad CEU San Pablo

 

10:15-11:15

"Ultra low power consumption through Dynamic Voltage Frequency”

Roberto Sierra, Universidad Politécnica de Madrid

 

11:15-11:30

Relaxing cup of coffee

 

11:30-12:10

"Trends in FPGA design"

Ricardo Gómez, Silica AVNET

 

12:10-13:10

"System design of a novel PET scanner: the story of a successful public-private partnership"

Pedro Guerra, Universidad Politécnica de Madrid

 

Speakers

Roberto Sierra

Roberto Sierra received the Engineering Degree in 2008 and the M.S. degree in 2011 from the Universidad Politecnica de Madrid (U.P.M.). He is currently pursuing a Ph.D. in Electronic System Engineering at the Electrical Engineering Department (D.I.E.), E.T.S.I. Telecomunicacion at U.P.M. He has actively participated in several national and international research projects. His current research interests are in the areas of meta-architecture of digital systems and electronic design automation of high-performance reconfigurable computing systems.

Pedro Guerra

Pedro Guerra (PhD'07, MSc'01) is under-tenure full time senior researcher at Universidad Politécnica de Madrid. He started his professional career in 1999 at the National Center for Microelectronics (Spanish Council for Scientific Research) in Seville. In 2001 he moved to Synopsys, a leading company in EDA tools, where he worked in the development of novel digital receivers, including full digital and mixed signal solutions for 2.5G and 3G. In 2003 he started his PhD at UPM in the field of positron emission tomography (PET), whose disertation titled "contributions to the design and implementation of a high resolution PET" was defended in 2007. Appointed as Ramon y Cajal grant holder in 2010, his current research focuses on the design of novel acquisition front-ends for high performance imaging systems in medical applications.