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Microelectronics Laboratory (LDIM 2)

Electronic document: 
Créditos Totales: 
3.0
Créditos de Laboratorio: 
3.0
Delivery dates: 
Second semester
Type of subject: 
Itinerario I3
Instructional Objectives: 
Microelectronics Laboratory is the subject practical complement to Microelectronics. It aims to introduce students to the professional work environment using the usual CAD toolbox full custom design of mixed-signal integrated circuits.
The ultimate objective is the practical realization of a complete design of a relatively complex circuit using commercial CAD tools for full custom design, all of Cadence:
  •  
  • Schematic editing. Analog simulation. Editing and synthesis paths: Virtuoso.
  • Layout verification (DRC and LVS): Assura
  • Parasitic extraction: QRC

 

Program: 

The laboratory will be in pairs in the laboratory of Building B (B-043). Each pair is assigned a desk  to choose between morning or afternoon. Each time slot is three hours.

Practical works:

  • Week 1: Introduction to Cadence work environment. Design, simulation and characterization of an inverter schematic. Design, simulation and characterization of two cell diagram basic NAND, NOR of two inputs or similar.
  • Week 2: Advanced characterization of circuits with the Analog Design Environment. Parameters. Calculator. Parametric simulations. Monte Carlo simulations. Corners simulations.
  • Week 3: Editing paths, extraction and verification of operation. Inverter, NAND and NOR.
  • Week 4: Sequential Circuits. Full custom design and characterization of recording media.
  • Weeks 5 and 6: Design, simulation and characterization of a cell of average complexity (memory cell flip-flop, etc..).
  • Weeks 7, 8, 9 and 10: Completing the final practice, design, simulation, characterization and delineation of a block design chosen as final practice.

Teaching methodology

The course will run for 10 weeks in laboratory sessions practical. During the first three weeks sessions will be preceded by a short talk introducing theoretical issues of the course and the practical demonstrations.

Practices to week 6 are guided, you can follow step by step practice notes at your disposal. At the end of each session, students will make a brief report to work.

The final practice developed between weeks 7 and 10 is free and is intended to complete the design (layout) and characterization of a circuit of moderate complexity. Be offered several topics, but also encourages students to delve into any design theme full custom analog, digital or mixed.

To justify the work done, the corresponding files will be delivered to paths and a document of 3 to 6 pages in IEEE Conference format (preferably in Latex) including at least the following points:

  • Summary (Abstract): Concise summary of the work performed and results obtained.
  • Introduction (Introduction): Introduction to the problems and how to solve the circuit has been previously decided in the scientific literature.
  • Functional description of the design (Functional Description of the Design).
  • Destaller implementation (Implementation Issues).
  • Characterization (Characterization): including the explanation of the work environment, experiments and results of characterization. Optionally you can include a comparison with previous work.
  • Conclusions (Conclusions).
  • Bibliography

You can include all the figures that are deemed necessary to improve the explanations of the text. Optionally, the drafting of the report can be done in English (see section name in brackets). The work was presented orally to other colleagues at the end of the course. The exposure of each job will last 10 minutes approximate. In the talk should be involved two team members.

Review: 
The practices of the first six weeks will be reviewed and evaluated by teachers, constituting 30% of the overall mark.

The technical quality and originality of the final practice account for 40%.

The quality of the oral presentation and the memory of the final practice contribute 20% of the grade.

The remaining 10% comes from the student's demonstrated skills in the use of the work environment along the course.

 

Más Información
Subject code: 
93000719
Course Number which belongs within the qualification: 
1
Center impartation: 
ETSIT
Academic year of teaching: 
2012-2013
Bibliography: 
Notes subject practices.
Digital VLSI Chip Design with Cadence and Synopsys CAD Tools. Erik Brunvand. Addison-Wesley. 2010.
CMOS VLSI Design: A Circuits and Systems Perspective N. Weste, D. Harris. Pearson Addison Wesley, 2005
Digital Integrated Circuits. A Design Perspective. (2nd Ed) J. Rabaey. Prentice Hall, 2003.
In general these references must add manuals used CAD tools and publications of the scientific literature related to end practice.